I write about stacks for a living, and I have a rule about vendor keynotes: ignore the adjectives, read the numbers, and ask what an engineer in Singapore would have to know to use any of it. Huawei’s three days in Shanghai produced a lot of adjectives. They also produced a set of numbers that, read together, describe a second accelerator ecosystem reaching the point where it recruits developers rather than borrows them. That has a direct consequence for anyone in Singapore who is writing an AI infrastructure job description this quarter, and I found out on Friday that it has one for me too.
What Was Announced on 19 September, in Numbers
HUAWEI CONNECT 2026 ran from 17 to 19 September at the Shanghai World Expo Exhibition & Convention Center. The developer-facing announcements came on the last day, in the press release “Huawei Advances Agentic Computing on Multiple Dimensions for SuperPoDs and SuperClusters”, datelined Shanghai, 19 September 2026, around a keynote by Zhu Zhaosheng, Chief Strategy Officer for Computing. Stripped of framing, the commitments were:
- Compute for the community: the Ascend open-source community “now provides 10k-NPU computing resources” to partners and developers.
- A baseline allocation for everyone: the 100 NPU-Hour Program, “providing every developer with a baseline allocation of compute resources for innovation in model training, inference, and other use cases”.
- Money: CNY 5 billion over the next three years “to bring together universities, research institutions, industry partners, and developers” around an ecosystem “powered by open source and open systems”.
- Programming model: Ascend C upgraded for the new Ascend 950 generation with SIMD + SIMT and Regbase programming; the PTO ISA, a tile-based instruction set of “more than 120 virtual instructions across eight categories”, opened up, with the explicit goal of “operator source code portability across processor generations”.
- Agent tooling, open-sourced: CANNBot for operator generation, Model Agent for model adaptation, MindStudio Agent for precision tuning, Solution Agent for deployment. Plus ThinkPro in openEuler as the “atomic unit of agent thinking” and a move from HiF8 to a lower-precision HiF4 format.
Zhu’s one-line summary of the intent: “Our goal is to give developers an open foundation, the freedom to build on their own terms, and the space to innovate.” Two days earlier, in the opening keynote by rotating chairman David Wang, the company had given the numbers that make that sentence more than marketing: external developers now make up 61 percent of the CANN community, “outnumbering internal developers for the first time”, with over 5,200 monthly active developers; more than 40 models natively pre-trained on Ascend; over 90 third-party open-source projects supported; and Ascend “officially supported as a PyTorch accelerator backend”. The Kunpeng CPU ecosystem, by the same speech, has 4.16 million developers, and the UnifiedBus-connected SuperCluster “can scale up to one million NPUs”.
💡 Our Expert Take
The number that matters for hiring is 61 percent. An accelerator ecosystem where most of the contributors work for the vendor is a product. One where most of them do not is a labour market. I am not making a claim about whether Ascend hardware is competitive with what your Singapore team runs today; I am observing that a second, large, open pool of engineers is now being trained, funded and given free compute to write operators and port models for a non-CUDA backend, and that a meaningful share of that pool sits in the same universities and companies your recruiters call. When two ecosystems each have a labour market, the scarce engineer is the one who can work in both, and the expensive mistake is a job description that only admits one.
4 Singapore Job Descriptions, 4 Mentions of CUDA, 0 Mentions of Portability
On Friday afternoon I pulled the four AI infrastructure requisitions I am currently briefed on for Singapore clients: an ML platform engineer for a fintech, an inference engineer for a logistics company with operations in Vietnam and Guangdong, an operator and kernel engineer for a computer-vision start-up, and an MLOps lead for a healthcare group. I searched each for the accelerator it asked for. All four said CUDA, three of them in the first five bullet points. None said “portable”, “backend-agnostic”, or named a second accelerator. Two asked for “deep expertise in NVIDIA tooling” without saying what problem that expertise would solve.
I want to be fair to the people who wrote them. For most of the last five years, CUDA was where the engineers were and where the capacity was, and specifying it was a reasonable shortcut. What changed, and what the 19 September numbers make concrete, is that the shortcut now has a cost on both sides of the hiring equation.
💡 Our Expert Take
The cost on the candidate side is the pool. When I filter our Singapore AI infrastructure candidates for “has run production workloads on two or more accelerator backends”, the group is small but it is where the strongest engineers cluster, because the people who have ported an operator once understand the abstraction the framework is hiding. A CUDA-only spec does not exclude them, but it does not attract them either, and it strongly attracts the engineer who has only ever called one vendor’s library. The cost on the employer side is the stack. Every one of the four clients has told me in the last year that accelerator cost is their largest infrastructure line; three have asked whether alternative capacity in the region would be cheaper. The honest answer is that the question is unanswerable with a team that cannot run the benchmark, and a CUDA-only hiring spec guarantees that team. Our seven-step guide to hiring AI infrastructure engineers in Singapore already argued for backend-agnostic screening; Friday’s audit is what it looks like when the argument is ignored.
The 4 Rewrites
Each rewrite replaces a vendor name with a piece of evidence. I give the before and after lines as they now read in the requisitions, with the client’s permission and the client’s identity removed.
1. ML platform engineer (fintech)
Before: “5+ years with CUDA and NVIDIA GPU clusters.” After: “Has scheduled training and inference workloads across at least two accelerator types in one cluster, and can explain how the scheduler decided placement.” The skill was never CUDA; it was heterogeneous scheduling, and the fintech’s own roadmap includes CPU inference for the low-latency path anyway.
2. Inference engineer (logistics, Vietnam and Guangdong operations)
Before: “Deep expertise in NVIDIA inference tooling.” After: “Has exported a model through PyTorch to at least two accelerator backends, measured the throughput difference, and documented which operators fell back.” This client’s Guangdong site runs on regional capacity that is not NVIDIA, which the job description had not mentioned because the person who wrote it did not know.
3. Operator and kernel engineer (computer-vision start-up)
Before: “Expert CUDA kernel developer.” After: “Has written or ported a custom operator for two different instruction sets and validated numerical equivalence; experience with tile-based or SIMT programming models on any backend.” The 19 September announcements are precisely about this layer: a tile-based ISA opened for portability, and SIMD + SIMT programming added. A kernel engineer who has only ever written for one target is the least portable hire on this list, and the most expensive to replace.
4. MLOps lead (healthcare)
Before: “Experience managing GPU fleets and CUDA driver versions.” After: “Has owned the low-precision policy for a production model (FP8 or below), including the accuracy monitoring that goes with it, on any accelerator.” Huawei’s HiF8-to-HiF4 move is one of several low-precision pushes this year; the healthcare client’s actual risk is silent accuracy drift under quantisation, not driver versions. Our guide to evaluating engineers on open-weight model deployment has the interview questions for that risk.
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Let’s Discuss ItThe Interview Task the Free NPU-Hours Make Possible
The most useful line in the 19 September release, for a hiring manager, is the smallest one: a baseline allocation of compute for every developer. Cross-backend take-home tasks have always been hard to set because the candidate needs access to the second backend, and most do not have it. A free baseline allocation removes that excuse, on one platform at least. The task we have started sending to shortlisted candidates for the four roles above:
- Take a small open-weight model you know well.
- Run it on the GPU you have access to through PyTorch, and record throughput and memory.
- Register for the community allocation, run the same model on the NPU through the PyTorch backend, and record the same numbers.
- Report the difference, list every operator that fell back or failed, and say what you would change in the model or the export to close the gap.
A portable engineer finishes in an afternoon and sends back a one-page comparison with a fallback list. A single-vendor engineer sends back either a working GPU run and an apology, or a week’s worth of questions. Both are useful signals. Two caveats: check on the Ascend community site whether the allocation is available to Singapore-based developers on the terms announced before you rely on it, and never make the task about the specific vendor. The point is the candidate’s reasoning across a boundary, and any second backend they can reach, AMD, Google, Apple, would do as well.
💡 Our Expert Take
There is a version of this article that tells Singapore employers to start hiring for Ascend. That is not this article. Which accelerator your team should run on in 2027 depends on your clients, your regulators, your budget and your sovereignty requirements, and for many Singapore companies the answer will remain the one they have. What the 19 September announcements settle is narrower and more useful: the second ecosystem is now real enough to be a hiring variable, the engineers who can cross between ecosystems are the ones both sides will fight for, and Chinese groups recruiting on the NUS and NTU campuses, which we wrote about in August’s guide to competing with them for AI talent, will be screening for exactly that crossing. Write the job description for the engineer who can run the benchmark, and you keep the hardware decision in your own hands. Write it for one vendor, and you have already made the decision without knowing it.
The Same Question, Asked in Dubai
Our Dubai colleagues have been tracking the anti-CUDA push from the other side of the industry: their analysis of Qualcomm’s Tenstorrent and Modular moves in June reached the same hiring conclusion from a different set of vendors, and their seven-step guide to hiring on-device AI engineers in Dubai covers the NPU end of the portability skill, where the operator fallback problem is the same one this article’s interview task is built around.
FAQ — Huawei Connect 2026 and AI Infrastructure Hiring in Singapore
What did Huawei announce for developers on 19 September 2026?
On the final day of HUAWEI CONNECT 2026 in Shanghai, Zhu Zhaosheng, Huawei’s Chief Strategy Officer for Computing, announced that the Ascend community now provides 10k-NPU-scale computing resources to partners and developers, launched the 100 NPU-Hour Program giving every developer a baseline compute allocation for training and inference work, and committed CNY 5 billion over the next three years to bring universities, research institutions, partners and developers into the ecosystem. On the technical side Huawei upgraded Ascend C for the Ascend 950 generation with SIMD + SIMT and Regbase programming, opened the PTO ISA, a tile-based instruction set of more than 120 virtual instructions across eight categories designed for operator portability across processor generations, and open-sourced CANNBot, Model Agent, MindStudio Agent and Solution Agent.
Why does a Chinese accelerator ecosystem matter for hiring in Singapore?
Three reasons. Singapore’s AI workloads increasingly run for clients and parent companies across ASEAN and Greater China, where Ascend-based capacity exists and is growing; Chinese AI labs and tech groups recruit from the same NUS and NTU pipeline your team does, and they hire for multi-backend fluency; and the broader industry, including AMD, Google and Qualcomm, is pushing PyTorch toward backend-agnostic deployment, so a job description that specifies CUDA as the only acceptable accelerator experience narrows your candidate pool and locks your stack to a single vendor’s pricing. None of this requires you to buy Ascend hardware; it requires you to hire people who can move a model between backends.
What should an AI infrastructure job description in Singapore ask for instead of CUDA experience?
Ask for evidence of portability rather than a vendor name: a model or training job the candidate has run on at least two accelerator backends through PyTorch, with the performance difference measured; a custom operator or kernel they have written or ported and how they validated it; experience with low-precision formats (FP8 and below) and the accuracy trade-off; and, for platform roles, experience scheduling heterogeneous accelerators in one cluster. Keep CUDA as one acceptable backend among several. The skill you are buying is the ability to make the hardware decision reversible.
Can I use Huawei’s free NPU-hours as an interview exercise?
The 100 NPU-Hour Program, as announced, gives every registered developer a baseline compute allocation, which makes a short cross-backend take-home task possible at no cost to the candidate or to you: export a small model, run it on the NPU through the PyTorch backend, and report throughput and any operator fallbacks compared with a GPU run. Candidates who have never used the platform can complete it in a few hours if they understand backends; candidates who only know one vendor’s tooling generally cannot. Whether the programme is open to Singapore-based developers on the same terms should be checked on the Ascend community site before you rely on it.
Four JDs said CUDA. None said portable. Check yours.
We will review your AI infrastructure requisitions against the four rewrites and introduce the engineers who have already run the cross-backend benchmark. Machine learning engineers | DevOps engineers | Technology comparison
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